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  overvoltage crowbar sensing circuit this overvoltage protection circuit (ovp) protects sensitive electronic circuitry from overvoltage transients or regulator failures when used in conjunction with an external acrowbaro scr. the device senses the overvoltage condition and quickly acrowbarso or short circuits the supply, forcing the supply into current limiting or opening the fuse or circuit breaker. the protection voltage threshold is adjustable and the mc3423 can be programmed for minimum duration of overvoltage condition before tripping, thus supplying noise immunity. the mc3423 is essentially a atwo terminalo system, therefore it can be used with either positive or negative supplies. maximum ratings rating symbol value unit differential power supply voltage v cc v ee 40 vdc sense voltage (1) v sense1 6.5 vdc sense voltage (2) v sense2 6.5 vdc remote activation input voltage v act 7.0 vdc output current i o 300 ma operating ambient t emperature range t a 0 to +70 c operating junction temperature t j 125 c storage temperature range t stg 65 to +150 c simplified application v out v in c out current limited dc power supply o. v. p. mc3423 + on semiconductor  ? semiconductor components industries, llc, 2001 november, 2001 rev. 3 1 publication order number: mc3423/d mc3423 semiconductor technical data overvoltage sensing circuit ordering information pin connections d suffix plastic package case 751 (sop8) p1 suffix plastic package case 626 1 2 3 45 6 7 8 v cc sense 1 sense 2 current source drive output v ee indicator output remote activation (top view) device operating temperature range package t a = 0 to +70 c so8 plastic dip mc3423d mc3423p1 8 1 8 1
mc3423 http://onsemi.com 2 electrical characteristics (5.0 v v cc v ee 36 v, t low < t a , t high , unless otherwise noted.) characteristics symbol min typ max unit supply voltage range v cc v ee 4.5 40 vdc output voltage (i o = 100 ma) v o v cc 2.2 v cc 1.8 vdc indicator output voltage (i o(ind) = 1.6 ma) v ol (ind) 0.1 0.4 vdc sense trip voltage (t a = 25 c) v sense1, v sense2 2.45 2.6 2.75 vdc temperature coefficient of v sense1 (figure 2) tcv s1 0.06 %/ c remote activation input current (v ih = 2.0 v, v cc v ee = 5.0 v) (v il = 0.8 v, v cc v ee = 5.0 v) i ih i il 5.0 120 40 180 m a source current i source 0.1 0.2 0.3 ma output current risetime (t a = 25 c) t r 400 ma/ m s propagation delay time (t a = 25 c) t pd 0.5 m s supply current i d 6.0 10 ma notes: t low to t high = 0 to +70 c 1 2 4 8 6 5 3 7 + -+ - + - i source v cc sense 1 v ee sense 2 remote activation indicator output output current source v ref 2.6v figure 1. representative block diagram (b) switch 1 switch 2 v sense 1 v sense 2 position a position b closed open ramp v i until output goes high; this is the v sense threshold. v 8 75 1 2 3 4 (a) switch 1 switch 2 v cc v i figure 2. sense voltage test circuit mc3423
mc3423 http://onsemi.com 3 figure 3. basic circuit configuration figure 4. circuit configuration for supply voltage above 36 v figure 5. basic configuration for programmable duration of overvoltage condition before trip for minimum value of r g , see figure 9. *see text for explanation. r2 10 k w for minimum drift + - to load power supply r1 r2 mc3423 f1 1 2 3 4 75 8 r g (+ sense lead) (- sense lead) s1* * *r2 10 k w q1: v s 50 v; 2n6504 or equivalent q1: v s 100 v; 2n6505 or equivalent q1: v s 200 v; 2n6506 or equivalent q1: v s 400 v; 2n6507 or equivalent q1: v s 600 v; 2n6508 or equivalent q1: v s 800 v; 2n6509 or equivalent r s power supply mc3423 (- sense lead) (+ sense lead) 1 8 2 3 4 75 q1 10 m f 15v + 1n4740 10v + to load *r2 r1 indication out r3 v trip t d = v ref c [12 10 3 ] c  (see figure 10) power supply r1 r2 mc3423 r3 c 1 2 47 5 3 8 6 v 10 v c v o +v cc v cc v trip v ref v io v o v c 0 0 0 t d r g - c 1 > r s (r 1 + r 2 ) 10 m f c 1 r 1 r 2 10 ma i source v s v trip  v ref   1  r1 r2    2.6v  1  r1 r2  r s   v s10 25   k  v trip  v ref   1  r1 r2    2.6v  1  r1 r2 
mc3423 http://onsemi.com 4 application information basic circuit configuration the basic circuit configuration of the mc3423 ovp is shown in figure 3 for supply voltages from 4.5 v to 36 v, and in figure 4 for trip voltages above 36 v. the threshold or trip voltage at which the mc3423 will trigger and supply gate drive to the crowbar scr, q1, is determined by the selection of r1 and r2. their values can be determined by the equation given in figures 3 and 4, or by the graph shown in figure 8. the minimum value of the gate current limiting resistor, r g , is given in figure 9. using this value of r g , the scr, q1, will receive the greatest gate current possible without damaging the mc3423. if lower output currents are required, r g can be increased in value. the switch, s1, shown in figure 3 may be used to reset the crowbar. otherwise, the power supply, across which the scr is connected, must be shut down to reset the crowbar. if a non currentlimited supply is used, a fuse or circuit breaker, f1, should be used to protect the scr and/or the load. the circuit configurations shown in figures 3 and 4 will have a typical propagating delay of 1.0 m s. if faster operation is desired, pin 3 may be connected to pin 2 with pin 4 left floating. this will result in decreasing the propagating delay to approximately 0.5 m s at the expense of a slightly increased tc for the trip voltage value. configuration for programmable minimum duration of overvoltage condition before tripping in many instances, the mc3423 ovp will be used in a noise environment. to prevent false tripping of the ovp circuit by noise which would not normally harm the load, mc3423 has a programmable delay feature. to implement this feature, the circuit configuration of figure 5 is used. in this configuration, a capacitor is connected from pin 3 to v ee . the value of this capacitor determines the minimum duration of the overvoltage condition which is necessary to trip the ovp. the value of c can be found from figure 10. the circuit operates in the following manner: when v cc rises above the trip point set by r1 and r2, an internal current source (pin 4) begins charging the capacitor, c, connected to pin 3. if the overvoltage condition disappears before this occurs, the capacitor is discharged at a rate @ 10 times faster than the charging rate, resetting the timing feature until the next overvoltage condition occurs. occasionally, it is desired that immediate crowbarring of the supply occur when a high overvoltage condition occurs, while retaining the false tripping immunity of figure 5. in this case, the circuit of figure 6 can be used. the circuit will operate as previously described for small overvoltages, but will immediately trip if the power supply voltage exceeds v z1 + 1.4 v. power supply r1 r2 mc3423 r g (+ sense lead) (- sense lead) - + 1k z1 7 3 4 5 2 1 8 c figure 6. configuration for programmable duration of overvoltage condition before trip/with immediate trip at high overvoltages additional features 1. activation indication output an additional output for use as an indicator of ovp activation is provided by the mc3423. this output is an open collector transistor which saturates when the ovp is activated. in addition, it can be used to clock an edge triggered flipflop whose output inhibits or shuts down the power supply when the ovp trips. this reduces or eliminates the heatsinking requirements for the crowbar scr. 2. remote activation input another feature of the mc3423 is its remote activation input, pin 5. if the voltage on this cmos/ttl compatible input is held below 0.8 v, the mc3423 operates normally. however, if it is raised to a voltage above 2.0 v, the ovp output is activated independent of whether or not an overvoltage condition is present. it should be noted that pin 5 has an internal pullup current source. this feature can be used to accomplish an orderly and sequenced shutdown of system power supplies during a system fault condition. in addition, the activation indication output of one mc3423 can be used to activate another mc3423 if a single transistor inverter is used to interface the former's indication output to the latter 's remote activation input, as shown in figure 7. in this circuit, the indication output (pin 6) of the mc3423 on power supply 1 is used to activate the mc3423 associated with power supply 2. q1 is any small pnp with adequate voltage rating.
mc3423 http://onsemi.com 5 power supply #1 r1 power supply #2 + - + - 10k q1 1.0k 5 7 1 7 6 1 figure 7. circuit configuration for activating one mc3423 from another note that both supplies have their negative output leads tied together (i.e., both are positive supplies). if their positive leads are common (two negative supplies) the emitter of q1 would be moved to the positive lead of supply 1 and r1 would therefore have to be resized to deliver the appropriate drive to q1. crowbar scr considerations referring to figure 11, it can be seen that the crowbar scr, when activated, is subject to a large current surge from the output capacitance, c out . this capacitance consists of the power supply output caps, the load's decoupling caps, and in the case of figure 1 1a, the supply's input filter caps. this surge current is illustrated in figure 12, and can cause scr failure or degradation by any one of three mechanisms: di/dt, absolute peak surge, or i 2 t. the interrelationship of these failure methods and the breadth of the applications make specification of the scr by the semiconductor manufacturer difficult and expensive. therefore, the designer must empirically determine the scr and circuit elements which result in reliable and effective ovp operation. however, an understanding of the factors which influence the scr's di/dt and surge capabilities simplifies this task. di/dt as the gate region of the scr is driven on, its area of conduction takes a finite amount of time to grow, starting as a very small region and gradually spreading. since the anode current flows through this turnedon gate region, very high current densities can occur in the gate region if high anode currents appear quickly (di/dt). this can result in immediate destruction of the scr or gradual degradation of its forward blocking voltage capabilities depending on the severity of the occasion. v t , trip voltage (v) 0 5.0 10 15 20 25 30 min 30 20 10 0 r1, resistance (k) w typ r2 = 2.7 k max figure 8. r1 versus trip voltage v cc , supply voltage (v) 35 30 25 20 15 10 01020304050 607080 rg, gate current limiting resistor ( w ) r g(min) = 0 if v cc < 11 v figure 9. minimum r g versus supply voltage t d , delay time (ms) c, capacitance (f) m 123571 1 5 2 1 0.0001 0.001 0.01 0.1 1.0 0.001 0.01 0.1 1.0 10 figure 10. capacitance versus minimum overvoltage duration
mc3423 http://onsemi.com 6 ov sense ov sense *needed if supply not current limited v in v in v out v out dc power supply dc power supply c out c out + + * (11a) (11b) figure 11. typical crowbar ovp circuit configurations l pk surge due to output capacitor current limited supply output di dt l t figure 12. crowbar scr surge current waveform r & l empirically determined! esr esl r lead l lead output cap to mc3423 r l figure 13. circuit elements affecting scr surge and di/dt the usual design compromise then is to use a garden variety fuse (3ag or 3ab style) which cannot be relied on to blow before the thyristor does, and trust that if the scr does fail, it will fail short circuit. in the majority of the designs, this will be the case, though this is difficult to guarantee. of course, a sufficiently high surge will cause an open. these comments also apply to the fuse in figure 11b. the value of di/dt that an scr can safely handle is influenced by its construction and the characteristics of the gate drive signal. a centergatefire scr has more di/dt capability than a cornergatefire type, and heavily overdriving (3 to 5 times i gt ) the scr gate with a fast <1.0 m s rise time signal will maximize its di/dt capability. a typical maximum number in phase control scrs of less than 50 a(rms) rating might be 200 a/ m s, assuming a gate current of five times i gt and < 1.0 m s rise time. if having done this, a di/dt problem is seen to still exist, the designer can also decrease the di/dt of the current waveform by adding inductance in series with the scr, as shown in figure 13. of course, this reduces the circuit's ability to rapidly reduce the dc bus voltage and a tradeoff must be made between speedy voltage reduction and di/dt. surge current if the peak current and/or the duration of the surge is excessive, immediate destruction due to device overheating will result. the surge capability of the scr is directly proportional to its die area. if the surge current cannot be reduced (by adding series resistance see figure 13) to a safe level which is consistent with the systems requirements for speedy bus voltage reduction, the designer must use a higher current scr. this may result in the average current capability of the scr exceeding the steady state current requirements imposed by the dc power supply. a word about fusing before leaving the subject of the crowbar scr, a few words about fuse protection are in order. referring back to figure 11a, it will be seen that a fuse is necessary if the power supply to be protected is not output current limited. this fuse is not meant to prevent scr failure but rather to prevent a fire! in order to protect the scr, the fuse would have to possess an i 2 t rating less than that of the scr and yet have a high enough continuous current rating to survive normal supply output currents. in addition, it must be capable of successfully clearing the high short circuit currents from the supply. such a fuse as this is quite expensive, and may not even be available. crowbar scr selection guide as an aid in selecting an scr for crowbar use, the following selection guide is presented. device i rms i fsm package 2n6400 series 16 a 160 a to220 plastic 2n6504 series 25 a 160 a to220 plastic 2n1842 series 16 a 125 a metal stud 2n2573 series 25 a 260 a metal to3 type 2n681 series 25 a 200 a metal stud mcr39351 series 35 a 350 a metal stud mcr815 series 80 a 1000 a metal stud
mc3423 http://onsemi.com 7 package dimensions p1 suffix plastic package case 62605 issue l notes: 1. dimension l to center of lead when formed parallel. 2. package contour optional (round or square corners). 3. dimensioning and tolerancing per ansi y14.5m, 1982. 14 5 8 f note 2 a b t seating plane h j g d k n c l m m a m 0.13 (0.005) b m t dim min max min max inches millimeters a 9.40 10.16 0.370 0.400 b 6.10 6.60 0.240 0.260 c 3.94 4.45 0.155 0.175 d 0.38 0.51 0.015 0.020 f 1.02 1.78 0.040 0.070 g 2.54 bsc 0.100 bsc h 0.76 1.27 0.030 0.050 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m --- 10 --- 10 n 0.76 1.01 0.030 0.040  d suffix plastic package case 75107 (sop8) issue w seating plane 1 4 5 8 n j x 45  k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 x y g m y m 0.25 (0.010) z y m 0.25 (0.010) z s x s m 
mc3423 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into t he body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc3423/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada


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